CD74HC109 series datasheets. Manufacturer: Texas Instruments.

5962-9070101MEA HIGH SPEED CMOS LOGIC DUAL POSITIVE-EDGE TRIGGER J-K FLIP-FLOPS WITH SET AND RESET in 16-pin J package. Operational temperature range from -55°C to 125°C. Datasheet*) CD54HC109F3A HIGH SPEED CMOS LOGIC DUAL POSITIVE-EDGE TRIGGER J-K FLIP-FLOPS WITH SET AND RESET in 16-pin J package. Operational temperature range from -55°C to 125°C. Datasheet*) CD54HCT109F3A HIGH SPEED CMOS LOGIC DUAL POSITIVE-EDGE TRIGGER J-K FLIP-FLOPS WITH SET AND RESET in 16-pin J package. Operational temperature range from -55°C to 125°C. Datasheet*) CD74HC109E HIGH SPEED CMOS LOGIC DUAL POSITIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET in 16-pin N package. Operational temperature range from -55°C to 125°C. Datasheet*) CD74HC109M HIGH SPEED CMOS LOGIC DUAL POSITIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET in 16-pin D package. Operational temperature range from -55°C to 125°C. Datasheet*) CD74HC109M96 HIGH SPEED CMOS LOGIC DUAL POSITIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET in 16-pin D package. Operational temperature range from -55°C to 125°C. Datasheet*) CD74HCT109E HIGH SPEED CMOS LOGIC DUAL POSITIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET in 16-pin N package. Operational temperature range from -55°C to 125°C. Datasheet*) CD74HCT109M HIGH SPEED CMOS LOGIC DUAL POSITIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET in 16-pin D package. Operational temperature range from -55°C to 125°C. Datasheet*) CD74HCT109M96 HIGH SPEED CMOS LOGIC DUAL POSITIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET in 16-pin D package. Operational temperature range from -55°C to 125°C. Datasheet*) CD54HC109 Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger Datasheet*) CD54HCT109 Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger Datasheet*) CD74HC109MT Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger Datasheet*) CD74HCT109MT Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger Datasheet*) CD74HC109 Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger Datasheet*) CD74HCT109 Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger Datasheet*) CD74HC109EE4 High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset Datasheet*) CD74HC109M96E4 High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset Datasheet*) CD74HC109ME4 High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset Datasheet*) CD74HC109MTE4 High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset Datasheet*) CD74HCT109EE4 High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset Datasheet*) CD74HCT109M96E4 High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset Datasheet*) CD74HCT109ME4 High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset Datasheet*) CD74HCT109MTE4 High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset Datasheet*)

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