| 54LS10 | Triple 3-Input NAND Gates | Datasheet*) |
| 54LS10E | Triple 3-Input NAND Gates | Datasheet*) |
| 54LS10J | Triple 3-Input NAND Gates | Datasheet*) |
| 54LS10M | Triple 3-Input NAND Gates | Datasheet*) |
| 54LS10N | Triple 3-Input NAND Gates | Datasheet*) |
| 54LS10W | Triple 3-Input NAND Gates | Datasheet*) |
| DM54LS10 | Triple 3-Input NAND Gates | Datasheet*) |
| DM54LS10E | Triple 3-Input NAND Gates | Datasheet*) |
| DM54LS10J | Triple 3-Input NAND Gates | Datasheet*) |
| DM54LS10M | Triple 3-Input NAND Gates | Datasheet*) |
| DM54LS10N | Triple 3-Input NAND Gates | Datasheet*) |
| DM54LS10W | Triple 3-Input NAND Gates | Datasheet*) |
| DM74LS10 | Triple 3-Input NAND Gates | Datasheet*) |
| DM74LS10E | Triple 3-Input NAND Gates | Datasheet*) |
| DM74LS10J | Triple 3-Input NAND Gates | Datasheet*) |
| DM74LS10M | Triple 3-Input NAND Gates | Datasheet*) |
| DM74LS10N | Triple 3-Input NAND Gates | Datasheet*) |
| DM74LS10W | Triple 3-Input NAND Gates | Datasheet*) |
| 54LS109 | Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs | Datasheet*) |
| 54LS109J | Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs | Datasheet*) |
| 54LS109M | Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs | Datasheet*) |
| 54LS109N | Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs | Datasheet*) |
| DM54LS109A | Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs | Datasheet*) |
| DM54LS109AJ | Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs | Datasheet*) |
| DM54LS109AM | Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs | Datasheet*) |
| DM54LS109AN | Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs | Datasheet*) |
| DM74LS109A | Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs | Datasheet*) |
| DM74LS109AJ | Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs | Datasheet*) |
| DM74LS109AM | Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs | Datasheet*) |
| DM74LS109AN | Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs | Datasheet*) |
| 54LS109DMQB | 7 V, dual positive-edge-triggered master-slave J-K flip-flop with preset, clear and complementary output in 16-pin DIL package. Operational temperature range from -55°C to 125°C. | Datasheet*) |
| 54LS109FMQB | 7 V, dual positive-edge-triggered master-slave J-K flip-flop with preset, clear and complementary output in 16-pin DIL package. Operational temperature range from -55°C to 125°C. | Datasheet*) |
| DM54LS109AJ | 7 V, dual positive-edge-triggered master-slave J-K flip-flop with preset, clear and complementary output in 16-pin DIL package. Operational temperature range from -55°C to 125°C. | Datasheet*) |
| DM54LS109AW | 7 V, dual positive-edge-triggered master-slave J-K flip-flop with preset, clear and complementary output in 16-pin DIL package. Operational temperature range from -55°C to 125°C. | Datasheet*) |
| DM74LS109AM | 7 V, dual positive-edge-triggered master-slave J-K flip-flop with preset, clear and complementary output in 16-pin DIL package. Operational temperature range from 0°C to 70°C. | Datasheet*) |
| DM74LS109AN | 7 V, dual positive-edge-triggered master-slave J-K flip-flop with preset, clear and complementary output in 16-pin DIL package. Operational temperature range from 0°C to 70°C. | Datasheet*) |
